Simple non-deterministic rewriting in verification
dc.contributor.author | Letichevsky, A. | |
dc.contributor.author | Peschanenko, V. | |
dc.date.accessioned | 2010-12-27T13:54:06Z | |
dc.date.available | 2010-12-27T13:54:06Z | |
dc.date.issued | 2010 | |
dc.description.abstract | Abstract. We discuss the non-deterministic rewriting in application for engine functions of Verification of Formal Specification (VFS) system in this paper. VFS – are tools to prove properties of systems described as formal specifications (basic protocols), such as the completeness (the system behavior has a possible continuation at each of its stages) and consistency (the system behavior is deterministic at each stage), safety (something bad will never happened), or the correspondence of the specified behavior to given scenarios. Together these tools constitute a powerful environment for the formal verification of formal specifications expressed through message sequence charts. | uk_UA |
dc.identifier.citation | Simple non-deterministic rewriting in verification / A. Letichevsky, V. Peschanenko // Пробл. програмув. — 2010. — № 2-3. — С. 98-101. — Бібліогр.: 14 назв. — англ. | uk_UA |
dc.identifier.issn | 1727-4907 | |
dc.identifier.udc | 004.41,004.51 | |
dc.identifier.uri | https://nasplib.isofts.kiev.ua/handle/123456789/14641 | |
dc.language.iso | en | uk_UA |
dc.publisher | Інститут програмних систем НАН України | uk_UA |
dc.status | published earlier | uk_UA |
dc.subject | Теоретичні та методологічні основи програмування | uk_UA |
dc.title | Simple non-deterministic rewriting in verification | uk_UA |
dc.type | Article | uk_UA |
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