An analytical accumulation mode SOI pMOSFET model for high-temperature analog applications

Abstract

An accumulation mode SOI pMOSFET model for simulation of analog circuits meant for high-temperature applications is presented in the paper. The model is based on explicit expressions for the drain current with an infinite order of continuity what assures smooth transitions between different operation regimes of the transistor. This model is valid for all regimes of normal operation, demonstrates proper description of high-temperature behavior of the subthreshold and off-state current. The model characteristics show a good agreement with the experimental data for temperatures up to 300 °C.